TeraPixel Technologies Inc. was established as a company that develops semiconductor IP used for processing video and images.
Today, we are developing not only video technology, but also custom semiconductor products based on massively parallel processor design technology with many cores in parallel, and cryptographic ASSP chips with excellent power performance using state-of-the-art process technologies such as 5nm and 7nm.
Develop IPs for both ASIC and FPGA Cryptographic IP / SSTL single-ended image transfer IP / JVC-KENWOOD image processing IP (Super-resolution, Noise reduction, FRC, Scaler) / Various analog IP and Others
ALIS VECTORSTATION, a high-end general-purpose High-Performance Computer equipped with the vector processor NEC SX-Aurora TSUBASA, which has acquired the powerful computing performance actually used in supercomputers. (Selling in Japan only)
Cryptocurrency mining ASIC on TSMC 7nm FinFET process | JPEG-XS codec IP |
Performance evaluation Chip on TSMC 5nm FinFET process | MIPI C-PHY/D-PHY controller IP |
RISC-V massive-parallel ASIC for Genome Analysis | 3G-SDI/HD-SDI controller IP |
Networking ASIC on 8nm FinFET process | Sub-LVDS controller IP |
Image Signal Processor ASIC | Image Scaling IP |
Realtime Video-Transceiver device through Wi-Fi | JPEG codec IP |
TeraPixel Technologies welcomes a variety of human resources for the development of new technologies.
– Job Categories –
Logical design engineer / embedded software engineer
Company Name:
TeraPixel Technologies, Inc.
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Address:
3rd Floor, VORT ShinYokohama Bldg., 3-2-6 Shin-Yokohama, Kohoku-ward, Yokohama-city, 222-0033 JAPAN
Phone: +81-45-475-9017
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Established in:
January 2014
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Capital:
99 million yen
(plus a capital reserve 96 million yen)
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CEO:
Naoki Kawahara
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Number of Employees:
15
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Business Lineup:
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Main Customers:
NEC, Sony LSI Design, Panasonic, Socionext, NTT Electronics, NHK Science & Technologies Research Laboratories, Ikegami Tsushinki, Brother Industries, Axell, Eizo, FOR-A, JVC Kenwood, PFU and etc.
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May, 2022
Design-Partner agreement with NEC Coproration.
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October, 2021
Design-Partner agreement with EFINIX, Inc., FPGA vendor.
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January, 2020
Completed characterization of the world’s first prototype chip on TSMC 5nm FinFET process.
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June, 2019
Awarded design and development of Networking ASIC on 8nm FinFET process.
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February, 2019
Started joint development with Socionext for the world’s first prototype chip on TSMC 5nm FinFET process
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September, 2018
Completed evaluation and productization of large-scale ASIC on TSMC 7nm FinFET process.
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June, 2017
Received Japan’s First Large-Scale ASIC Design and Development Order on TSMC 7nm FinFET Process.
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June, 2014
Started the sales of JPEG Codec developed by TeraPixel.
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January, 2014
Concluded an agency contract for high-speed I/F IP with the U.S. company Silicon Image Inc. (current Lattice Semiconductor).
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January, 2014
Company established.
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3F, VORT ShinYokohama Bldg., 3-2-6 Shin-Yokohama, Kohoku-ward, Yokohama-city , 2220033 JAPAN
Phone: +81-45-475-9017